COURSE OBJECTIVES
- To explain how digital circuit of large complexity can be built in a methodological way to acquire the knowledge about memory architectures.
- To illustrate how the concepts presented in the lectures are applied in practice, and how the need to accommodate different practically motivated trade-offs can lead to alternative implementations.
- To teach fundamental concepts of hardware description languages.
COURSE OUTCOMES
On completion of the course, student will be able to
CO1 Apply the steps for state table reduction and state assignment, ASM chart and ASM tables for the design of synchronous sequential design.
CO2 Determine the Real Time Challenges in the design of Asynchronous sequential circuits.
CO3 Elaborate the feasibility of sequential circuit design using PLA.
CO4 Evaluate the testing algorithms and perform the comparison study for digital circuits.
CO5 Design the Combinational logic circuits using VHDL.
CO6 Construct the low power sequential circuit using VHDL.
- ஆசிரியர்: MUTHIAH M. A
- ஆசிரியர்: Indhu R